Robust Transistor Circuit Design with IGBTs and SiC-MOSFETs
2019/02/05
This whitepaper shares some design guidelines and advice on how to reduce failure causes and simplify the design - with application examples for a better comprehension.
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Designing Robust Transistor Circuits with IGBTs and SiC MOSFETs
When evaluating new switching transistor circuits, designers often focus solely on the transistor specifications. However, a critical factor influencing the robustness of the overall design is the gate driver circuit. To understand the impact of driver parameters, let us first examine the ideal conditions using an example IGBT transistor (IKW20N60H3).
According to the transistor datasheet at 25°C, the relevant parameters are:
Gate emitter voltage threshold = 4.1V - 5.7V
Based on these values, a gate driver supply of +15V relative to GND is sufficient. Under ideal conditions, the corresponding driver circuit would appear as follows:
Fig. 1: Simple gate driver circuit for an ideal IGBT
Looks pretty simple! However, when the parasitic elements are considered, the real-life model becomes more complex:
Fig. 2: Realistic gate driver circuit including IGBT parasitic components
If we now take into account that the gate-emitter threshold also varies over the temperature range, it becomes clear that the threshold voltage decreases significantly with increasing temperature (several mV/K) and, in the worst case, can fall well below the typical minimum value of 4.1V measured at 25°C.
Fig. 3: Gate-Emitter threshold voltage variation with temperature
The driver circuit must be designed to prevent unwanted turn-on under all operating conditions. Otherwise, this can lead to shoot-through short circuits, which may result in increased power losses, greater component stress, reduced service life, degraded EMC performance, and in extreme cases, the destruction of the transistor.
Essentially, there are two types of unwanted switch-on events:
An unwanted turn-on due to the effect of the Miller capacitance (Creverse)
An unwanted turn-on due to the effect of the parasitic inductances (Lgate and Lemitter).
According to the transistor datasheet at 25°C, the relevant parameters are:
Vge max = ± 20V
Gate emitter voltage threshold = 4.1V - 5.7V
Based on these values, a gate driver supply of +15V relative to GND is sufficient. Under ideal conditions, the corresponding driver circuit would appear as follows:
Fig. 1: Simple gate driver circuit for an ideal IGBT
Looks pretty simple! However, when the parasitic elements are considered, the real-life model becomes more complex:
Fig. 2: Realistic gate driver circuit including IGBT parasitic components
If we now take into account that the gate-emitter threshold also varies over the temperature range, it becomes clear that the threshold voltage decreases significantly with increasing temperature (several mV/K) and, in the worst case, can fall well below the typical minimum value of 4.1V measured at 25°C.
Fig. 3: Gate-Emitter threshold voltage variation with temperature
The driver circuit must be designed to prevent unwanted turn-on under all operating conditions. Otherwise, this can lead to shoot-through short circuits, which may result in increased power losses, greater component stress, reduced service life, degraded EMC performance, and in extreme cases, the destruction of the transistor.
Essentially, there are two types of unwanted switch-on events:
An unwanted turn-on due to the effect of the Miller capacitance (Creverse)
An unwanted turn-on due to the effect of the parasitic inductances (Lgate and Lemitter).
An Unwanted Turn-on due to the Effect of the Miller Capacitance
As the collector-emitter voltage rises – either when the low-side IGBT is turned off or during operation in a bridge circuit – the high-side IGBT turns on, and current flows through the anti-parallel diode. In this process, the Miller capacitance, Creverse, must be charged.
The Miller capacitance charging current can be calculated as follows:
The Miller capacitance is listed in most transistor datasheets; however, it is typically only a rough estimate. The value of Creverse is highly voltage-dependent and also varies with temperature and current. Since most datasheets define the Miller capacitance under specific ideal conditions, it is strongly recommended to measure this value under actual operating conditions. The following graph illustrates the effect of VCE on the reverse capacitance:
Fig. 4: Variation of Creverse with VCE in an IGBT (IKW20N60H3)
The additional capacitive load of Creverse is not an issue for most driver circuits; it only becomes problematic when the input capacitance CInput becomes sufficiently charged by the current flowing through Creverse – causing the transistor to turn on again.
The charging current of CInput can be defined from the following ...
The Miller capacitance charging current can be calculated as follows:
Fig. 4: Variation of Creverse with VCE in an IGBT (IKW20N60H3)
The additional capacitive load of Creverse is not an issue for most driver circuits; it only becomes problematic when the input capacitance CInput becomes sufficiently charged by the current flowing through Creverse – causing the transistor to turn on again.
The charging current of CInput can be defined from the following ...
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