Combining the advantages of ICT and FCT in a single test adapter: a case study
2020. 4. 13
In-Circuit Testing (ICT) is an established method of analysing an electronic product in production. Typically, a bed-of-nails approach is used to test a non-powered circuit board and techniques such as Direct Digital Synthesis (DDS) and Discrete Fourier Transform (DFT) are used to generate stimulus signals and to perform analogue measurement analysis.
This allows the In-Circuit Analyser (ICA) to measure real-world attributes such as inductance, capacitance, impedance and resistance to check if all of the Device Under Test (DUT) test node results are within tolerance and if any component is open, shorted, incorrect or misoriented, all without having to power up the DUT. The interconnection between the nail contacts and the relevant analogue channel or digital Driver/Sensor (D/S) on the pin board is accomplished by using a relay multiplexer (Figure 1).
Figure 1: Typical bed-of-nails 2x16 relay multiplexer (only one channel shown in the diagram)
In some more advanced systems, the ICA module can also be used to carry out limited functional component testing (FCT) by applying power to the device and measuring the input and output characteristics under load. More often, this test is done separately with a second test adapter. There are several practical reasons for doing this:
Firstly, the ICT bed-of-nails probes are not rated to carry the necessary supply voltage or load current to carry out a full function test on powered-up devices. A dedicated FCT test-bed will have heavy-duty contacts designed to carry higher currents or voltages without overheating, arcing or suffering from excessive wear. The disadvantage is that these heavy-duty contacts take up more space and therefore FCT test adapters typically check only one DUT at a time.
Secondly, the ICA internal programmable power supplies, relays and electronic loads are also not designed for high current testing. If the power supply units are simply swapped out for more powerful versions, the higher current can cause serious interference problems with the sensitive ICT analogue measurements, including introduction of measurement inaccuracies due to ground-bounce, voltage drop along wiring and through transients generated from switching inductive loads. The measurements carried out in a dedicated FCT adapter are usually lower resolution with heavier filtering, so they are less sensitive to interference. Also, the power supplies and relay contacts are more robust and able to switch more than one amp.
Thirdly, the relay interface hardware and software control used to change the relay configuration is typically via a Parallel Input Output (PIO) controller and relay driver (Figure 2). For ICT applications, the relay switching speed is not usually an issue as the relays are mainly reconfigured at the end of each DUT test to multiplex connections from one pin assembly to the next. However, in an FCT test adapter, the relays are used to change the functional test setup for each separate test on each DUT, so the control data throughput to the relays is higher. In a dedicated FCT set-up, this is not an issue as only one DUT is checked at a time, but if multiple devices are going to be tested in a combined ICT/FCT adapter, then the speed limitation of the relay control is a major bottleneck.
Figure 2: Test System Block Diagram
Finally, while ICT measurements can be made in milliseconds, FCT procedures are typically much slower as measurements made while the unit is powered up cannot be made instantaneously; the outputs have to settle before a reliable measurement can be taken. Typically, the FCT process will take five to ten times as long as ICT to complete for the same product. If the testing is combined in one ICT/FCT platform, then the FCT part could be a bottleneck in production. If the two processes are separated, then one ICT machine could feed several FCT testbeds used in parallel to increase the throughput and reduce the bottleneck.
Nevertheless, for a newly developed DC/DC product series developed by the Austrian company Recom Power, the additional cost and testing time for two separate test adapters was not acceptable. A way had to be found to combine the high speed advantage of ICT with the practical quality assurance of 100% functional testing, all in one test adapter. This was technically a complex challenge: the product series covered devices with up to 6A output current and input voltages up to 60V. Each PCB panel contained forty partly-finished modules which meant that parallel testing was required using heavy-duty power supplies. The data throughput was therefore not only very high but any timing errors could be problematic. Recom contracted Elmatest in the Czech Republic to build a combined ICT/FCT test adapter for the Teledyne Teststation LH used by the EMS provider.
From the beginning, Zdenek Martinek, the application engineer at Elmatest, realised that this was no ordinary project. There were several significant problems that needed to be solved: how to combine ICT/FCT in one multi-panel, how to handle the high relay control throughput, how to accelerate the FCT process and how to cope with the high power levels without harming the sensitive probes. In close co-operation with Markus Stöger from Recom’s R&D department, a solution was found for all of these issues.
The first problem that needed to be solved was how to combine ICT/FCT in the multi-panel design of the product. Each PCB contained 40 independent circuits. These modules were not part-built, but complete products, already finished, cased and screen printed and not all of the internal nodes were accessible to the ICT pin panel. This was deliberate. The DC/DC converter switches at high internal frequencies and it is integral to the product concept that the metal case and its multi-layer PCB forms a complete six-sided faraday cage to avoid EMI issues. Any external connections to an internal high frequency switching node would form a pathway for EMI to pass through the EMC seal and to radiate, possibly causing measurement errors.
The solution to “How to ICT test an enclosed and inaccessible product?” was to create a test module on each multi-panel. The test module allows access to all of the ICT nodes necessary on the test module to verify that each panel is built correctly. Once the conventional ICT procedure is carried out on the test module, then the remaining modules need be FCT-checked only.
Figure 3: Top and bottom images of the multi-panel PCB showing the ICT test module in the corner.
The code required to carry out a single test and measurement process is called a test vector. The arrangement of the inputs, outputs and analogue channel configurations required to carry out the measurement is transmitted as a data ‘burst’. These configurations are loaded into local on-board memory and then simultaneously activated by a timing strobe signal. This configuration is then latched until the test has been completed and the measurement data has been transferred back to the CPU. However, in the meantime, the next data burst can be pre-loaded into the registers to await the next strobe signal. This methodology is what allows ICT to achieve its very fast throughput of around 4µs per vector.
However, the standard relay drivers used in the GenRad Teststation are driven from the Parallel Input/Output (PIO) controller which in turn is given commands from the controlling PC via a MXIbus (Figure 2). This arrangement proved to be too slow for our project where we want to process different FCT measurements within a single test vector using the high speed System Controller to control the relay configuration. In order to accelerate the relay switching rate, a novel relay driver topology was implemented in the Recom test adapter, based on a technique called ‘active burst’.
In active burst, some of the relays are not driven from the PIO controller card, but driven directly from the D/S outputs which are kept active until the ICA measurements have been completed. Each D/S can be configured with 9 separate functions (Idle, Drive low or high, Sense low or high, Hold, Drive with deep serial memory, Sense with deep serial memory and Collect CRC data), so in our case, we used the Drive function to directly power the relays. The D/S Drive output is limited to TTL voltage and current levels, normally not sufficient to operate a relay without a separate driver, but by building the test adapter using Darlington transistor current amplifier relay coils, the D/S modules were able to operate the relays directly, bypassing the PIO controller. This made the relay control practically instant and made the coding much simpler.
The second problem that needed to be solved was how to accelerate the FCT part of the test; waiting for the analogue levels to settle would have made the overall testing still unacceptably slow. The technique used here was to use the processing power already inherent in the ICA system. Waveform generation and analysis techniques such Direct Digital Synthesis (DDS) and Discrete Fourier Transform (DFT) were used, which are inherently faster than any analogue bridge balancing measurement technique. The breakthrough was to realise that these same advanced techniques could also be used to determine the powered-up functional testing results. Instead of applying a fixed load, waiting for the output to stabilise and then measuring the input and output currents and voltages, the output load could be pulsed for a few milliseconds and the processed results used to derive the final output characteristics. This reduced the measurement time by up to 80%.
Figure 4: 6-Terminal Impedance Measurement
One significant development issue was matching such dynamic load and supply switching with the ancient “spaghetti” software used in the GenRad test station, which is a mix of Pascal, Assembler and Basic. However, although GenRad ceased to exist as a separate company back in 2003, it is a tribute to the robustness of the design that even today it is possible to piggy-back state-of-the-art operating systems on top of the original hardware.
The solution to the second problem also solved the third problem: how to avoid damaging the sensitive probes. As the load current was pulsed only for a very short time, there was no noticeable local heating at the very fine contact area, even with 6A peak current through a probe rated at only two amps. The on-time/off-time ratio could also be programmed so that even with sequential measurements, the probe tip had time to cool down between pulses and would not burn or scorch. This pulsed load technique also meant that the power supplies were not overloaded.
ICT is also used to measure the internal voltage divider resistances used to pre-set the output voltage, allowing the test system to automatically derive the output voltage, output current and input voltage range from ICT and then pass these values on to the FCT test program so that the appropriate functional testing can be carried out. This eliminates the possibility of operator error setting the FCT variables out-of-range and damaging either the product or the expensive pin boards or programmable power supplies.
The net result of all of these techniques is a combined ICT/FCT test time of between 1.8 and 1.9 seconds per DC/DC module, meaning that a complete PCB multi-panel can be 100% tested in less than 80 seconds, including removal of the tested PCB and placement of the next PCB to be tested into the test adapter. With a minimum production run of 5000, the cumulative time-saving has been instrumental in the resulting success of the entire product series. So much so, that the initial design of the RPM module has now been extended from a single series with eight variants to three different series with a total of twenty-two variants, all sharing the same footprint and test adapter.
Figure 5: The finished test adapter in action
RECOM: We Power your Products
Figure 1: Typical bed-of-nails 2x16 relay multiplexer (only one channel shown in the diagram)
In some more advanced systems, the ICA module can also be used to carry out limited functional component testing (FCT) by applying power to the device and measuring the input and output characteristics under load. More often, this test is done separately with a second test adapter. There are several practical reasons for doing this:
Firstly, the ICT bed-of-nails probes are not rated to carry the necessary supply voltage or load current to carry out a full function test on powered-up devices. A dedicated FCT test-bed will have heavy-duty contacts designed to carry higher currents or voltages without overheating, arcing or suffering from excessive wear. The disadvantage is that these heavy-duty contacts take up more space and therefore FCT test adapters typically check only one DUT at a time.
Secondly, the ICA internal programmable power supplies, relays and electronic loads are also not designed for high current testing. If the power supply units are simply swapped out for more powerful versions, the higher current can cause serious interference problems with the sensitive ICT analogue measurements, including introduction of measurement inaccuracies due to ground-bounce, voltage drop along wiring and through transients generated from switching inductive loads. The measurements carried out in a dedicated FCT adapter are usually lower resolution with heavier filtering, so they are less sensitive to interference. Also, the power supplies and relay contacts are more robust and able to switch more than one amp.
Thirdly, the relay interface hardware and software control used to change the relay configuration is typically via a Parallel Input Output (PIO) controller and relay driver (Figure 2). For ICT applications, the relay switching speed is not usually an issue as the relays are mainly reconfigured at the end of each DUT test to multiplex connections from one pin assembly to the next. However, in an FCT test adapter, the relays are used to change the functional test setup for each separate test on each DUT, so the control data throughput to the relays is higher. In a dedicated FCT set-up, this is not an issue as only one DUT is checked at a time, but if multiple devices are going to be tested in a combined ICT/FCT adapter, then the speed limitation of the relay control is a major bottleneck.
Figure 2: Test System Block Diagram
Finally, while ICT measurements can be made in milliseconds, FCT procedures are typically much slower as measurements made while the unit is powered up cannot be made instantaneously; the outputs have to settle before a reliable measurement can be taken. Typically, the FCT process will take five to ten times as long as ICT to complete for the same product. If the testing is combined in one ICT/FCT platform, then the FCT part could be a bottleneck in production. If the two processes are separated, then one ICT machine could feed several FCT testbeds used in parallel to increase the throughput and reduce the bottleneck.
Nevertheless, for a newly developed DC/DC product series developed by the Austrian company Recom Power, the additional cost and testing time for two separate test adapters was not acceptable. A way had to be found to combine the high speed advantage of ICT with the practical quality assurance of 100% functional testing, all in one test adapter. This was technically a complex challenge: the product series covered devices with up to 6A output current and input voltages up to 60V. Each PCB panel contained forty partly-finished modules which meant that parallel testing was required using heavy-duty power supplies. The data throughput was therefore not only very high but any timing errors could be problematic. Recom contracted Elmatest in the Czech Republic to build a combined ICT/FCT test adapter for the Teledyne Teststation LH used by the EMS provider.
From the beginning, Zdenek Martinek, the application engineer at Elmatest, realised that this was no ordinary project. There were several significant problems that needed to be solved: how to combine ICT/FCT in one multi-panel, how to handle the high relay control throughput, how to accelerate the FCT process and how to cope with the high power levels without harming the sensitive probes. In close co-operation with Markus Stöger from Recom’s R&D department, a solution was found for all of these issues.
The first problem that needed to be solved was how to combine ICT/FCT in the multi-panel design of the product. Each PCB contained 40 independent circuits. These modules were not part-built, but complete products, already finished, cased and screen printed and not all of the internal nodes were accessible to the ICT pin panel. This was deliberate. The DC/DC converter switches at high internal frequencies and it is integral to the product concept that the metal case and its multi-layer PCB forms a complete six-sided faraday cage to avoid EMI issues. Any external connections to an internal high frequency switching node would form a pathway for EMI to pass through the EMC seal and to radiate, possibly causing measurement errors.
The solution to “How to ICT test an enclosed and inaccessible product?” was to create a test module on each multi-panel. The test module allows access to all of the ICT nodes necessary on the test module to verify that each panel is built correctly. Once the conventional ICT procedure is carried out on the test module, then the remaining modules need be FCT-checked only.
Figure 3: Top and bottom images of the multi-panel PCB showing the ICT test module in the corner.
The code required to carry out a single test and measurement process is called a test vector. The arrangement of the inputs, outputs and analogue channel configurations required to carry out the measurement is transmitted as a data ‘burst’. These configurations are loaded into local on-board memory and then simultaneously activated by a timing strobe signal. This configuration is then latched until the test has been completed and the measurement data has been transferred back to the CPU. However, in the meantime, the next data burst can be pre-loaded into the registers to await the next strobe signal. This methodology is what allows ICT to achieve its very fast throughput of around 4µs per vector.
However, the standard relay drivers used in the GenRad Teststation are driven from the Parallel Input/Output (PIO) controller which in turn is given commands from the controlling PC via a MXIbus (Figure 2). This arrangement proved to be too slow for our project where we want to process different FCT measurements within a single test vector using the high speed System Controller to control the relay configuration. In order to accelerate the relay switching rate, a novel relay driver topology was implemented in the Recom test adapter, based on a technique called ‘active burst’.
In active burst, some of the relays are not driven from the PIO controller card, but driven directly from the D/S outputs which are kept active until the ICA measurements have been completed. Each D/S can be configured with 9 separate functions (Idle, Drive low or high, Sense low or high, Hold, Drive with deep serial memory, Sense with deep serial memory and Collect CRC data), so in our case, we used the Drive function to directly power the relays. The D/S Drive output is limited to TTL voltage and current levels, normally not sufficient to operate a relay without a separate driver, but by building the test adapter using Darlington transistor current amplifier relay coils, the D/S modules were able to operate the relays directly, bypassing the PIO controller. This made the relay control practically instant and made the coding much simpler.
The second problem that needed to be solved was how to accelerate the FCT part of the test; waiting for the analogue levels to settle would have made the overall testing still unacceptably slow. The technique used here was to use the processing power already inherent in the ICA system. Waveform generation and analysis techniques such Direct Digital Synthesis (DDS) and Discrete Fourier Transform (DFT) were used, which are inherently faster than any analogue bridge balancing measurement technique. The breakthrough was to realise that these same advanced techniques could also be used to determine the powered-up functional testing results. Instead of applying a fixed load, waiting for the output to stabilise and then measuring the input and output currents and voltages, the output load could be pulsed for a few milliseconds and the processed results used to derive the final output characteristics. This reduced the measurement time by up to 80%.
Figure 4: 6-Terminal Impedance Measurement
One significant development issue was matching such dynamic load and supply switching with the ancient “spaghetti” software used in the GenRad test station, which is a mix of Pascal, Assembler and Basic. However, although GenRad ceased to exist as a separate company back in 2003, it is a tribute to the robustness of the design that even today it is possible to piggy-back state-of-the-art operating systems on top of the original hardware.
The solution to the second problem also solved the third problem: how to avoid damaging the sensitive probes. As the load current was pulsed only for a very short time, there was no noticeable local heating at the very fine contact area, even with 6A peak current through a probe rated at only two amps. The on-time/off-time ratio could also be programmed so that even with sequential measurements, the probe tip had time to cool down between pulses and would not burn or scorch. This pulsed load technique also meant that the power supplies were not overloaded.
ICT is also used to measure the internal voltage divider resistances used to pre-set the output voltage, allowing the test system to automatically derive the output voltage, output current and input voltage range from ICT and then pass these values on to the FCT test program so that the appropriate functional testing can be carried out. This eliminates the possibility of operator error setting the FCT variables out-of-range and damaging either the product or the expensive pin boards or programmable power supplies.
The net result of all of these techniques is a combined ICT/FCT test time of between 1.8 and 1.9 seconds per DC/DC module, meaning that a complete PCB multi-panel can be 100% tested in less than 80 seconds, including removal of the tested PCB and placement of the next PCB to be tested into the test adapter. With a minimum production run of 5000, the cumulative time-saving has been instrumental in the resulting success of the entire product series. So much so, that the initial design of the RPM module has now been extended from a single series with eight variants to three different series with a total of twenty-two variants, all sharing the same footprint and test adapter.
Figure 5: The finished test adapter in action
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