The
gate drivers for SiC and GaN transistors must be tailored to the specific characteristics of each device. For high side gate drivers, the gate driver and its DC supply must be isolated.
First-generation
SiC MOSFETs typically require a +20V V
DD gate drive during the on−state to provide lowest on-resistance. Since the gate turn−on threshold can be less than 2V, SiC MOSFETs drivers typically swing to a negative gate voltage during the turn-off phase for optimal switching reliability.
For next generation devices, the optimal turn-on and turn-off voltages are +15 or +18V and -3 or -4V, respectively. The
gate driver must be capable of very fast rise and fall times on the order of a few ns, but otherwise most gate drivers can be used with asymmetric V
DD and V
EE supply voltages without any problems. The power consumption of the gate driver increases with higher switching frequency, but the peak gate drive currents are supplied by capacitors placed close to the driver power supply pins, and only low power 2W to 3W DC/DC converters needed.
A GaN high electron mobility transistor (HEMT) has a typical full enhancement voltage of 7V but will be damaged if V
GS exceeds 10V, which is much lower than the gate voltages required for
SiC gate drivers. Due to the extremely fast rise and fall times of the HEMT structure’s low-capacitance gate channel, any excessive inductance in the external gate drive could cause spikes or voltage ringing, leading to these voltage limits being exceeded. Therefore, a 6V gate drive voltage is a good compromise between high efficiency and staying within a safe operating range. Unlike the SiC MOSFET, the low capacitance of the HEMT gate channel allows the turn-off voltage to be zero volts.